Conventional Phase-Locked Loops, also known as Phase Lock Loops, achieve phase lock in part by pumping a limited charge current through a feedback loop to appropriately charge and/or discharge a low-pass filter capacitor. The voltage across the capacitor drives a voltage-controlled oscillator (VCO) to generate a periodic output signal. A divided version of the periodic output signal is evaluated to determine if it is in phase with a reference frequency signal that is used to control the activation/deactivation of the charge current pump. Because the reference frequency signal is used to control the charging of the capacitor driving the VCO, the frequency of the reference frequency signal (i.e., the reference frequency) affects the time to achieve phase lock between the output signal and the reference frequency signal. For higher reference frequencies, the activation/deactivation of the charge current pump occurs more rapidly and the time to achieve phase lock between the two signals is shorter. Conversely, for lower reference frequencies, the activation/deactivation of the charge current pump occurs less frequently and the time to achieve phase lock is greater. In some instances, the amount of time to achieve phase lock can be undesirable, particularly when the reference frequency is low and the phase of the divided version of the output signal is substantially offset from the phase of the reference frequency signal.